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Programmable Array Logic (PAL) chips are early programmable logic chips with relatively easy to study architecture and security mechanisms. In this hands-on workshop we'll use several techniques including micro-probing and electrically "brute forcing" to extract their firmware and/or logically equivalent firmware.

What to expect?

Students will defeat die level security circuitry by reconnecting blown security fuses under a microscope using very precise needles
Students will learn to use specialized PAL hardware and software tools to apply electrical test signals to the PALs and create equivalent programming files
For more information see this link

This workshop is limited to 12 people / batch and we'll run the workshop twice during the event (90 min / session). To secure your seat, please fill in this form. Only conference attendees can participate in the workshop.

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